The present disclosure relates to a semiconductor device such as a solid-state imaging device, a manufacturing method thereof, and an electronic apparatus, such as a camera, including the solid-state imaging device.
As a solid-state imaging device, there is known an amplification type solid-state imaging device such as an MOS, such as a CMOS (Complementary Metal Oxide Semiconductor), image sensor. Further, there is known a charge transfer type solid-state imaging device such as a CCD (Charge Coupled Device) image sensor. These solid-state imaging devices are widely used in digital still cameras, digital video cameras, or the like. In recent years, as solid-state imaging devices mounted in mobile apparatuses such as portable telephones with a camera or PDAs (Personal Digital Assistants), MOS image sensors have widely been used in terms of low power voltage and power consumption.
In the MOS solid-state imaging device, a unit pixel includes a photodiode serving as a photoelectric conversion unit and a plurality of pixel transistors. The MOS solid-state imaging device includes a pixel array (pixel region) including the plurality of unit pixels arranged in a two-dimensional array shape and a peripheral circuit region. The plurality of pixel transistors are formed as MOS transistors and includes three transistors, that is, a transmission transistor, a reset transistor, an amplification transistor or four transistors further including a selection transistor.
Hitherto, as such a MOS solid-state imaging device, there have been suggested various solid-state imaging devices in which a semiconductor chip including a pixel array, in which a plurality of pixels is arranged, and a semiconductor chip including a logic circuit performing signal processing are electrically connected to each other and are thus configured as a single device. For example, Japanese Unexamined Patent Application Publication No. 2006-49361 discloses a semiconductor module in which a backside illuminated image sensor chip including a micro-pad in each pixel cell and a signal processing chip including micro-pads, in which a signal processing circuit is formed, are connected to each other by micro-bumps.
International Publication No. WO2006/129762 discloses a semiconductor image sensor module in which a first semiconductor chip including an image sensor, a second semiconductor chip including an analog/digital converter array, and a third semiconductor chip including a memory element array are stacked. The first semiconductor chip and the second semiconductor chip are connected to each other via a bump which is a conductive connection conductor. The second semiconductor chip and the third semiconductor chip are connected to each other by a through contact perforated through the second semiconductor chip.
As disclosed in Japanese Unexamined Patent Application Publication No. 2006-49361, there have been suggested various techniques for consolidating different circuit chips such as the image sensor chip and the logic circuit performing signal processing. In the related techniques, substantially finished functional chips are connected to each other via formed through connection holes. Alternatively, the chips are connected to each other via bumps.